Lefschetz Center for Dynamical Systems Seminar
Brown Applied Mathematics Pattern Theory and Vision Seminar
Brown Analysis Seminar
LEMS and Electrical Science Seminar
Abstract:
In this talk I will introduce HML, a language for specifying hardware
at a very abstract level. We automatically generate VHDL from our
abstract specifications, allowing designers to mix and match HML and
VHDL descriptions. In HML you can specify the structure or behavior
of hardware or a mixture of the two. The HML system automatically
generates entity information and information about ports. Types are
automatically inferred from the way signals are used. HML
specifications are concise, and VHDL is generated quickly. This is
different from using templates for generating VHDL code because it is
more general, and the user does not need to invoke the template. We
are currently using HML as a front end to the Synopsys behavioral
compiler.
In this talk, I will give an introduction to hardware description
languages. Next I will describe HML, and present the design flow from
abstract specification to gate level implementation. I will describe
the process of generating VHDL from an HML specification, and present
several examples.
Bio: Miriam Leeser is an Associate Professor of Electrical and Computer Engineering at Northeastern University. She received her BS in EE from Cornell University and a Diploma and PhD, both in Computer Science from Cambridge University in England. She was on the faculty at Cornell University School of Electrical Engineering as an Assistant and Associate Professor, before joining the faculty of Northeastern in January, 1996. Her research interests include hardware description languages, high level synthesis, logic synthesis and formal verification.
PDE/Lefschetz Center Seminar
Department of Mathematics Colloquium
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